METHOD AND SYSTEM FOR IMPROVING ROCK BOTTOM SLEEP CURRENT OF PROCESSOR MEMORIES

Various embodiments include methods and devices for cache memory power control. Some embodiments may include determining whether a processor is entering a lowest power mode of the processor, and switching a lowest power mode switch control signal to indicate to a cache power switch of the processor...

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Bibliographic Details
Main Authors ARIMILLI, Rajesh, RANGARAJAN, Bharat Kumar, TURAGA, Srinivas
Format Patent
LanguageEnglish
Published 24.06.2021
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Various embodiments include methods and devices for cache memory power control. Some embodiments may include determining whether a processor is entering a lowest power mode of the processor, and switching a lowest power mode switch control signal to indicate to a cache power switch of the processor switching an electrical connection of a cache memory from a memory power rail to a processor power rail in response to determining that the processor is entering a lowest power mode.
Bibliography:Application Number: US201916724317