SEMICONDUCTOR MEMORY DEVICE

A semiconductor memory device according to an embodiment includes: a row decoder and a memory cell array including a first block. The first block includes: a first region, a second region adjacent to the first region in the first direction, and a third region configured to connect the first region a...

Full description

Saved in:
Bibliographic Details
Main Author FUTATSUYAMA, Takuya
Format Patent
LanguageEnglish
Published 03.06.2021
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:A semiconductor memory device according to an embodiment includes: a row decoder and a memory cell array including a first block. The first block includes: a first region, a second region adjacent to the first region in the first direction, and a third region configured to connect the first region and the second region- The memory cell array further includes: a first insulating layer buried in a first trench between the first region and the second region and in contact with the third region; a first contact plug provided in the first insulating layer and electrically connected to the row decoder; and a first interconnect configured to connect a selection gate line and the first contact plug.
Bibliography:Application Number: US202117175045