MEMORY-BASED SOFTWARE BARRIERS

A mechanism is described for facilitating memory-based software barriers to emulate hardware barriers at graphics processors in computing devices. A method of embodiments, as described herein, includes facilitating converting thread scheduling at a processor from hardware barriers to software barrie...

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Bibliographic Details
Main Authors Koker, Altug, Ray, Joydeep, Vembu, Balaji, Valerio, James A, Appu, Abhishek R
Format Patent
LanguageEnglish
Published 20.05.2021
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
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Summary:A mechanism is described for facilitating memory-based software barriers to emulate hardware barriers at graphics processors in computing devices. A method of embodiments, as described herein, includes facilitating converting thread scheduling at a processor from hardware barriers to software barriers, where the software barriers emulate the hardware barriers.
Bibliography:Application Number: US202017103626