MEMORY DEVICE WITH A MULTIPLEXED COMMAND/ADDRESS BUS
A memory device includes a first plurality of volatile memories, a non-volatile memory, and a controller coupled to the non-volatile memory and including a first controller output. The memory device further includes a registering clock driver (RCD) including a first RCD output, and a first multiplex...
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Main Author | |
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Format | Patent |
Language | English |
Published |
29.04.2021
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Subjects | |
Online Access | Get full text |
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Summary: | A memory device includes a first plurality of volatile memories, a non-volatile memory, and a controller coupled to the non-volatile memory and including a first controller output. The memory device further includes a registering clock driver (RCD) including a first RCD output, and a first multiplexer including a first mux input coupled to the first RCD output, a second mux input coupled to the first controller output, and a first mux output coupled to the first plurality of volatile memories. The first multiplexer can be configured to provide command/address signals from one of the RCD and the controller to the first plurality of volatile memories. |
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Bibliography: | Application Number: US202117143120 |