MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

A memory device includes a transistor and a memory cell. The memory cell includes a bottom electrode, a top electrode, and a dielectric structure. The top electrode is electrically connected to the transistor. The dielectric structure includes a thin portion and a thick portion. The thin portion is...

Full description

Saved in:
Bibliographic Details
Main Authors HWU, Jenn-Gwo, CHIANG, Tzu-Hao
Format Patent
LanguageEnglish
Published 25.02.2021
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A memory device includes a transistor and a memory cell. The memory cell includes a bottom electrode, a top electrode, and a dielectric structure. The top electrode is electrically connected to the transistor. The dielectric structure includes a thin portion and a thick portion. The thin portion is sandwiched between the bottom electrode and the top electrode. The thick portion is thicker than the thin portion and between the bottom electrode and the top electrode.
Bibliography:Application Number: US201916549970