MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
A memory device includes a transistor and a memory cell. The memory cell includes a bottom electrode, a top electrode, and a dielectric structure. The top electrode is electrically connected to the transistor. The dielectric structure includes a thin portion and a thick portion. The thin portion is...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
25.02.2021
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Subjects | |
Online Access | Get full text |
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Summary: | A memory device includes a transistor and a memory cell. The memory cell includes a bottom electrode, a top electrode, and a dielectric structure. The top electrode is electrically connected to the transistor. The dielectric structure includes a thin portion and a thick portion. The thin portion is sandwiched between the bottom electrode and the top electrode. The thick portion is thicker than the thin portion and between the bottom electrode and the top electrode. |
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Bibliography: | Application Number: US201916549970 |