Semiconductor Hot-Spot and Process-Window Discovery Combining Optical and Electron-Beam Inspection

• Main Authors: Liang, Ardis, Narasimhan, Niveditha Lakshmi, Bhagwat, Sandeep, Plihal, Martin, Paramasivam, Saravanan
• Format: Patent
• Language: English
• Published: 11.02.2021
• Subjects: CALCULATING; COMPUTING; COUNTING; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL; INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES; MEASURING; PHYSICS; TESTING

To evaluate a semiconductor-fabrication process, a semiconductor wafer is obtained that includes die grouped into modulation sets. Each modulation set is fabricated using distinct process parameters. The wafer is optically inspected to identify defects. A nuisance filter is trained to classify the defects as DOI or nuisance defects. Based on results of the training, a first, preliminary process window for the wafer is determined and die structures having DOI are identified in a first group of modulation sets bordering the first process window. The trained nuisance filter is applied to the identified defects to determine a second, revised process window for the wafer. A third, further revised process window for the wafer is determined based on SEM images of specified care areas in one or more modulation sets within the second, revised process window. A report is generated that specifies the third process window.