SACRIFICIAL PADS TO PREVENT GALVANIC CORROSION OF FLI BUMPS IN EMIB PACKAGES

Embodiments disclosed herein include electronic packages and methods of making electronic packages. In an embodiment, the electronic package comprises a package substrate, an array of first level interconnect (FLI) bumps on the package substrate, wherein each FLI bump comprises a surface finish, a f...

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Bibliographic Details
Main Authors SOTO GONZALEZ, Javier, JEN, Wei-Lun K, IBRAHIM, Tarek A, CHO, Steve S, GAMBA, Jason M, MANEPALLI, Rahul N
Format Patent
LanguageEnglish
Published 04.02.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Embodiments disclosed herein include electronic packages and methods of making electronic packages. In an embodiment, the electronic package comprises a package substrate, an array of first level interconnect (FLI) bumps on the package substrate, wherein each FLI bump comprises a surface finish, a first pad on the package substrate, wherein the first pad comprises the surface finish, and wherein a first FLI bump of the array of FLI bumps is electrically coupled to the first pad, and a second pad on the package substrate, wherein the second pad is electrically coupled to the first pad.
Bibliography:Application Number: US201916525985