SECURE LOGIC LOCKING AND CONFIGURATION WITH CAMOUFLAGED PROGRAMMABLE MICRO NETLISTS

The camouflage technique described herein introduces programmed configuration inputs to Micro Netlists, creating Programmable Micro Netlists (PMNLs). PMNLs are a group of camouflaged and non-camouflaged cells that may be configured to perform one of several possible logic functions. They retain all...

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Bibliographic Details
Main Authors Chow, Lap Wai, Wang, Bryan J, Cocchi, Ronald P, Baukus, James P
Format Patent
LanguageEnglish
Published 07.01.2021
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Summary:The camouflage technique described herein introduces programmed configuration inputs to Micro Netlists, creating Programmable Micro Netlists (PMNLs). PMNLs are a group of camouflaged and non-camouflaged cells that may be configured to perform one of several possible logic functions. They retain all the protective properties of non-programmable MNLs, but also allow for secure post-manufacture configuration of their aggregate logic function.
Bibliography:Application Number: US202016905724