SEMICONDUCTOR STRUCTURE WITH DOPED VIA PLUG
A semiconductor structure is provided. The semiconductor structure includes a gate structure over a fin structure. The semiconductor structure also includes a source/drain structure in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a first contact plu...
Saved in:
| Main Authors | , , , , , , , , |
|---|---|
| Format | Patent |
| Language | English |
| Published |
24.12.2020
|
| Subjects | |
| Online Access | Get full text |
Cover
Loading…
| Abstract | A semiconductor structure is provided. The semiconductor structure includes a gate structure over a fin structure. The semiconductor structure also includes a source/drain structure in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a first contact plug over the source/drain structure. The semiconductor structure also includes a first via plug over the first contact plug. The semiconductor structure also includes a dielectric layer surrounding the first via plug. The first via plug includes a first group IV element and the dielectric layer includes the first group IV element and a second group IV element. |
|---|---|
| AbstractList | A semiconductor structure is provided. The semiconductor structure includes a gate structure over a fin structure. The semiconductor structure also includes a source/drain structure in the fin structure and adjacent to the gate structure. The semiconductor structure also includes a first contact plug over the source/drain structure. The semiconductor structure also includes a first via plug over the first contact plug. The semiconductor structure also includes a dielectric layer surrounding the first via plug. The first via plug includes a first group IV element and the dielectric layer includes the first group IV element and a second group IV element. |
| Author | TAN, Lun-Kuang HSIEH, Tung-Po LIU, Su-Hao CHEN, Kuo-Ju CHEN, Liang-Yin HUANG, Jing-Huei HUANG, Jie-Huang LIU, Hong-Chih CHANG, Huicheng |
| Author_xml | – fullname: HUANG, Jie-Huang – fullname: HUANG, Jing-Huei – fullname: CHEN, Liang-Yin – fullname: HSIEH, Tung-Po – fullname: TAN, Lun-Kuang – fullname: LIU, Hong-Chih – fullname: CHANG, Huicheng – fullname: LIU, Su-Hao – fullname: CHEN, Kuo-Ju |
| BookMark | eNrjYmDJy89L5WTQDnb19XT293MJdQ7xD1IIDgkCMkKDXBXCPUM8FFz8A1xdFMI8HRUCfELdeRhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRgYmBkYWpsaOhMXGqAB2LJ8g |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences |
| ExternalDocumentID | US2020402853A1 |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_US2020402853A13 |
| IEDL.DBID | EVB |
| IngestDate | Fri Jul 19 12:57:11 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_US2020402853A13 |
| Notes | Application Number: US202017007661 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201224&DB=EPODOC&CC=US&NR=2020402853A1 |
| ParticipantIDs | epo_espacenet_US2020402853A1 |
| PublicationCentury | 2000 |
| PublicationDate | 20201224 |
| PublicationDateYYYYMMDD | 2020-12-24 |
| PublicationDate_xml | – month: 12 year: 2020 text: 20201224 day: 24 |
| PublicationDecade | 2020 |
| PublicationYear | 2020 |
| RelatedCompanies | Taiwan Semiconductor Manufacturing Company, Ltd |
| RelatedCompanies_xml | – name: Taiwan Semiconductor Manufacturing Company, Ltd |
| Score | 3.3009527 |
| Snippet | A semiconductor structure is provided. The semiconductor structure includes a gate structure over a fin structure. The semiconductor structure also includes a... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | SEMICONDUCTOR STRUCTURE WITH DOPED VIA PLUG |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201224&DB=EPODOC&locale=&CC=US&NR=2020402853A1 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3fS8MwED7GFPVNp-J0SkHpixSly1J9KLI1rZ24trTN3NtoswwEmcNV_Pe9hE73tLdLDvILLl--XC4HcGNLFc_jUGsuZtIiouhZBRHSkrTrlNQunUKnThhFNOTkZdKbNOBjHQuj_wn90Z8jokUJtPdK79fL_0sspt9Wru7Kd6z6fApyl5k1O7a1o8hkA9dPYhZ7pue5PDOjVOuQKiE49ZEr7eBB2lH24I8HKi5luQkqwSHsJtjeojqChly0YN9b515rwd6odnmjWFvf6hhuM7VoccS4l8epkeUpCjz1jbdhHhosTnxmjId9I3nlzydwHfi5F1rY6_RvklOebQ6xewpNpP_yDIx7IQlygpmDbImoBFKUCvowp48EsZiUtA2dbS2db1dfwIEqqgcaNulAs_r6lpcIs1V5pVfnF2TlewA |
| link.rule.ids | 230,309,783,888,25576,76876 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFOebTsXp1ILSFylKl6X6UGRrWltdP-jH3FtpuwwEmcNV_Pe9hE33tLcjB5dL4HL55e5yADc6F_U8BtVm1ZRrpCr6WkEqrnHaM0qql0YhWyf4AXUz8jLpTxrwsa6Fkf-E_sjPEdGiKrT3Wp7Xi_9HLCZzK5d35TsOfT45qcnUFTrWZaBIZUPTjkIWWqplmVmiBrHkIVRC5zRArLRjCP3E5Wk8FHUpi02n4hzAboTy5vUhNPi8DS1r3XutDXv-KuSN5Mr6lkdwm4hNCwOWWWkYK0kaI5HFtvLmpa7CwshmytgbKNEoez6Ga8dOLVfDWfO_ReZZsqli7wSaCP_5KSj3FSeo7tRAtEREAylKK_owo48EfTEpaQe62ySdbWdfQctN_VE-8oLXc9gXLJGsoZMuNOuvb36BLrcuL-VO_QJU_33z |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=SEMICONDUCTOR+STRUCTURE+WITH+DOPED+VIA+PLUG&rft.inventor=HUANG%2C+Jie-Huang&rft.inventor=HUANG%2C+Jing-Huei&rft.inventor=CHEN%2C+Liang-Yin&rft.inventor=HSIEH%2C+Tung-Po&rft.inventor=TAN%2C+Lun-Kuang&rft.inventor=LIU%2C+Hong-Chih&rft.inventor=CHANG%2C+Huicheng&rft.inventor=LIU%2C+Su-Hao&rft.inventor=CHEN%2C+Kuo-Ju&rft.date=2020-12-24&rft.externalDBID=A1&rft.externalDocID=US2020402853A1 |