FREEZE LOGIC

A first plurality of logic gates and a second plurality of logic gates may be associated with a symmetric configuration. A first output at a first value may be generated by the first plurality of logic gates based on a first portion of input signals. A second output may be generated by the second pl...

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Bibliographic Details
Main Authors Hutter, Michael, Baker, Matthew Pond
Format Patent
LanguageEnglish
Published 17.12.2020
Subjects
ADVERTISING
CALCULATING
CODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHERPURPOSES INVOLVING THE NEED FOR SECRECY
COMPUTING
COUNTING
CRYPTOGRAPHY
DISPLAY
EDUCATION
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEALS
TESTING
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:A first plurality of logic gates and a second plurality of logic gates may be associated with a symmetric configuration. A first output at a first value may be generated by the first plurality of logic gates based on a first portion of input signals. A second output may be generated by the second plurality of logic gates at the first value based on a second portion of the input signals. A subsequent first output at a particular value may be generated by the first plurality of logic gates based on a first portion of a second plurality of input signals and a subsequent second output may be generated by the second plurality of logic gates based on a second portion of the second plurality of input signals. A value of the subsequent second output may be complementary to the particular value of the subsequent first output.
Bibliography:Application Number: US202016913479