HYBRID ANALOG-DIGITAL MATRIX PROCESSORS

Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy effi...

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Main Authors Forsythe, Martin B.Z, Bunandar, Darius, Kenney, Tyler J, Lazovich, Tomo
Format Patent
LanguageEnglish
Published 03.12.2020
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
HYBRID COMPUTING ARRANGEMENTS
PHYSICS
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Abstract Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.
AbstractList Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.
Author Lazovich, Tomo
Kenney, Tyler J
Forsythe, Martin B.Z
Bunandar, Darius
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Snippet Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques...
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SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
HYBRID COMPUTING ARRANGEMENTS
PHYSICS
Title HYBRID ANALOG-DIGITAL MATRIX PROCESSORS
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