HYBRID ANALOG-DIGITAL MATRIX PROCESSORS

Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy effi...

Full description

Saved in:
Bibliographic Details
Main Authors Forsythe, Martin B.Z, Bunandar, Darius, Kenney, Tyler J, Lazovich, Tomo
Format Patent
LanguageEnglish
Published 03.12.2020
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.
Bibliography:Application Number: US202016995674