Hardware Accelerator for Integral Image Computation

A hardware accelerator for computing integral image values of an image is provided that includes a plurality of row computation components configurable to operate in parallel to compute row sum values of respective rows of a row block of the image. The hardware accelerator is further configured to c...

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Bibliographic Details
Main Author Dubey, Aishwarya
Format Patent
LanguageEnglish
Published 26.11.2020
Subjects
CALCULATING
COMPUTING
COUNTING
HANDLING RECORD CARRIERS
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
PRESENTATION OF DATA
RECOGNITION OF DATA
RECORD CARRIERS
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Summary:A hardware accelerator for computing integral image values of an image is provided that includes a plurality of row computation components configurable to operate in parallel to compute row sum values of respective rows of a row block of the image. The hardware accelerator is further configured to compute integral image values for the row block using the row sum values and block pivots.
Bibliography:Application Number: US201916420152