SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes a substrate, first and second P-type well regions on the substrate, an N-type well region on the substrate and sandwiched between the first and second P-type well regions, a first peripheral circuit on a region of the first P-type well region adjacent to the N-...
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Main Authors | , , , , , , , |
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Format | Patent |
Language | English |
Published |
05.11.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor memory device includes a substrate, first and second P-type well regions on the substrate, an N-type well region on the substrate and sandwiched between the first and second P-type well regions, a first peripheral circuit on a region of the first P-type well region adjacent to the N-type well region and supplied with a reference voltage via a first wiring, and a second peripheral circuit on a region of the second P-type well region adjacent to the N-type well region and supplied with a reference voltage via a second wiring. |
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Bibliography: | Application Number: US202016934978 |