MEMORY DEVICES, CROSS-POINT MEMORY ARRAYS AND METHODS OF FABRICATING A MEMORY DEVICE
According to various non-limiting embodiments a memory device may include a silicon-on-insulator layer having a conductivity of a first polarity, a first raised structure over the silicon-on-insulator layer, the second raised structure over the silicon-on-insulator layer, an dummy gate arranged betw...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
22.10.2020
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Subjects | |
Online Access | Get full text |
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Summary: | According to various non-limiting embodiments a memory device may include a silicon-on-insulator layer having a conductivity of a first polarity, a first raised structure over the silicon-on-insulator layer, the second raised structure over the silicon-on-insulator layer, an dummy gate arranged between the first raised structure and the second raised structure, and a memory connected to the second raised structure. The first raised structure may have a conductivity of the first polarity, and the second raised structure may include a first diode layer having a conductivity of a second polarity opposite to the first polarity. |
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Bibliography: | Application Number: US201916387614 |