POWER MANAGEMENT INTEGRATED CIRCUIT (PMIC), MEMORY MODULE AND COMPUTING SYSTEM INCLUDING A PMIC, AND METHOD OF OPERATING A MEMORY SYSTEM

A power management integrated circuit (PMIC) includes a voltage regulator, a monitoring circuit, and a count register. The voltage regulator is configured to generate an output voltage. The monitoring circuit is configured to receive a feedback voltage of the output voltage, and to determine at each...

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Bibliographic Details
Main Authors LEE, JAEJUN, YUN, JINSEONG, LEE, KYUDONG
Format Patent
LanguageEnglish
Published 22.10.2020
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Summary:A power management integrated circuit (PMIC) includes a voltage regulator, a monitoring circuit, and a count register. The voltage regulator is configured to generate an output voltage. The monitoring circuit is configured to receive a feedback voltage of the output voltage, and to determine at each of periodic intervals whether the feedback voltage is outside a threshold voltage range. The count register is configured to store a count value indicative of a number of times the feedback voltage is determined by the monitoring circuit to be outside the threshold voltage range.
Bibliography:Application Number: US202016801221