MJT BASED ANTI-FUSES WITH LOW PROGRAMMING VOLTAGE
A memory element and methods of constructing the memory element are described. The memory element may include a bottom electrode structure having an uppermost portion of a first dimension. The memory element may further include a MTJ pillar having a bottommost portion forming an interface with the u...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
24.09.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A memory element and methods of constructing the memory element are described. The memory element may include a bottom electrode structure having an uppermost portion of a first dimension. The memory element may further include a MTJ pillar having a bottommost portion forming an interface with the uppermost portion of the bottom electrode structure. The bottommost portion of the MTJ pillar may have a second dimension that is less than the first dimension. The memory element may further include oxidized metal particles located on an outermost sidewall of the MTJ pillar. The memory element may further include a top electrode structure located in the MTJ pillar. |
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Bibliography: | Application Number: US201916360527 |