VERTICAL SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

A method for fabricating semiconductor device includes forming an alternating stack that includes a lower multi-layered stack and an upper multi-layered stack by alternately stacking a dielectric layer and a sacrificial layer over a substrate, forming a vertical trench that divides the upper multi-l...

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Bibliographic Details
Main Authors KIM, Eun-Ho, YOO, Jong-Hyun, YUN, Ki-Jun, LEE, Sung-Hoon, JUNG, Eun-Joo
Format Patent
LanguageEnglish
Published 17.09.2020
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Summary:A method for fabricating semiconductor device includes forming an alternating stack that includes a lower multi-layered stack and an upper multi-layered stack by alternately stacking a dielectric layer and a sacrificial layer over a substrate, forming a vertical trench that divides the upper multi-layered stack into dummy stacks, and forming an asymmetric stepped trench that is extended downward from the vertical trench to divide the lower multi-layered stack into a pad stack and a dummy pad stack, wherein forming the asymmetric stepped trench includes forming a first stepped sidewall that is defined at an edge of the pad stack, and forming a second stepped sidewall that is defined at an edge of the dummy pad stack and occupies less area than the first stepped sidewall.
Bibliography:Application Number: US201916570089