Protected System

In one embodiment, a protected system, includes a first apparatus disposed on a silicon chip, and to perform a functional process, a second apparatus disposed on the silicon chip, and to perform a protecting process having a verifiable test result, the first and the second apparatus having a physica...

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Bibliographic Details
Main Author Hershman, Ziv
Format Patent
LanguageEnglish
Published 09.07.2020
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In one embodiment, a protected system, includes a first apparatus disposed on a silicon chip, and to perform a functional process, a second apparatus disposed on the silicon chip, and to perform a protecting process having a verifiable test result, the first and the second apparatus having a physical layout which interleaves at least part of the first apparatus with at least part of the second apparatus so that an attack on the at least part of the first apparatus also attacks the at least part of the second apparatus, a primary controller to signal the second apparatus to perform the protecting process during a time period that the first apparatus is performing the functional process, and an attack handling controller to perform a protective action to protect the functional process responsively to the protecting process failing to verify the verifiable test result providing an indication that the attack is being performed.
Bibliography:Application Number: US201916240747