DEVICE AND METHOD FOR GENERATING ERROR CORRECTION INFORMATION
A device comprises an electronic data memory and a control unit configured to store a bit sequence in the electronic data memory as a stored bit sequence. The control unit is configured to check the stored bit sequence for bit errors, to generate error correction information having information about...
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Main Author | |
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Format | Patent |
Language | English |
Published |
21.05.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A device comprises an electronic data memory and a control unit configured to store a bit sequence in the electronic data memory as a stored bit sequence. The control unit is configured to check the stored bit sequence for bit errors, to generate error correction information having information about a correct bit value in the stored bit sequence, and to store the error correction information. |
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Bibliography: | Application Number: US201916688240 |