HIGH ASPECT RATIO CONNECTION FOR EMI SHIELDING

A packaged semiconductor device includes: a substrate; an semiconductor die attached to a top surface of the substrate; a mold body surrounding the semiconductor die; a tiered through mold via (TMV) comprising: a first recess having a recessed surface within the mold body at a first depth, and a sec...

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Bibliographic Details
Main Authors Hooper, Stephen Ryan, VINCENT, Michael B, Daniels, Dwight Lee
Format Patent
LanguageEnglish
Published 14.05.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A packaged semiconductor device includes: a substrate; an semiconductor die attached to a top surface of the substrate; a mold body surrounding the semiconductor die; a tiered through mold via (TMV) comprising: a first recess having a recessed surface within the mold body at a first depth, and a second recess from the recessed surface to a second depth that exposes a ground contact area on a bonding area on the top surface of the substrate, wherein the first depth is greater than the second depth; and a metal shielding layer formed on a top surface of the mold body to form a shielded mold body, wherein the metal shielding layer makes direct contact with at least one sidewall of the first recess, with at least a portion of the recessed surface, with at least one sidewall of the second recess, and with the ground contact area.
Bibliography:Application Number: US201816183910