TECHNIQUES FOR DUTY CYCLE CORRECTION
Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A...
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Main Authors | , , , , , |
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Format | Patent |
Language | English |
Published |
16.04.2020
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Subjects | |
Online Access | Get full text |
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Summary: | Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error. |
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Bibliography: | Application Number: US201916716234 |