System and Method to Handle I/O Page Faults in an I/O Memory Management Unit
An information handling system includes an input/output (I/O) device and an input/output memory management unit (I/OMMU). The I/OMMU is configured to translate virtual addresses from the I/O device to physical addresses in a memory. The I/O device is configured to send a first virtual address to the...
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Main Author | |
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Format | Patent |
Language | English |
Published |
27.02.2020
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Subjects | |
Online Access | Get full text |
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Summary: | An information handling system includes an input/output (I/O) device and an input/output memory management unit (I/OMMU). The I/OMMU is configured to translate virtual addresses from the I/O device to physical addresses in a memory. The I/O device is configured to send a first virtual address to the I/OMMU, to receive an error indication from the I/OMMU, and to send an interrupt in response to the error indication, wherein the error indication indicates that the I/OMMU failed to translate the particular first address into a first physical address. |
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Bibliography: | Application Number: US201916673358 |