MEMORY ARBITRATION TECHNIQUES BASED ON LATENCY TOLERANCE
Techniques relating to arbitration in a memory controller are disclosed. In some embodiments, the memory controller implements a per-bank priority-based arbitration scheme for different types of memory traffic (e.g., with different quality of service parameters). In some embodiments, the memory cont...
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| Main Authors | , , , , , , , , |
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| Format | Patent |
| Language | English |
| Published |
20.02.2020
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| Subjects | |
| Online Access | Get full text |
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| Abstract | Techniques relating to arbitration in a memory controller are disclosed. In some embodiments, the memory controller implements a per-bank priority-based arbitration scheme for different types of memory traffic (e.g., with different quality of service parameters). In some embodiments, the memory controller is configured to provide per-bank overrides to the arbitration scheme based on latency tolerance reported by one or more requesters sending a particular type of memory traffic. Various techniques disclosed herein may improve performance, improve fairness among different types of memory traffic, and/or reduce power consumption. |
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| AbstractList | Techniques relating to arbitration in a memory controller are disclosed. In some embodiments, the memory controller implements a per-bank priority-based arbitration scheme for different types of memory traffic (e.g., with different quality of service parameters). In some embodiments, the memory controller is configured to provide per-bank overrides to the arbitration scheme based on latency tolerance reported by one or more requesters sending a particular type of memory traffic. Various techniques disclosed herein may improve performance, improve fairness among different types of memory traffic, and/or reduce power consumption. |
| Author | Biswas, Sukalpa Hsiung, Kai Lun Notani, Rakesh L Nukala, Lakshmi Narasimha Murthy Mathews, Gregory S Magudilu Vijayaraj, Thejasvi Fu, Peter Liu, Yanzhe Keil, Shane J |
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| Snippet | Techniques relating to arbitration in a memory controller are disclosed. In some embodiments, the memory controller implements a per-bank priority-based... |
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| SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| Title | MEMORY ARBITRATION TECHNIQUES BASED ON LATENCY TOLERANCE |
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