TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD
A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English |
Published |
02.01.2020
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A semiconductor device structure includes a region of semiconductor material having an active region and a termination region. An active structure is disposed in the active region and a termination structure is disposed in the termination region. In one embodiment, the termination structure includes a termination trench and a conductive structure within the termination trench and electrically isolated from the region of semiconductor material by a dielectric structure. A dielectric layer is disposed to overlap the termination trench to provide the termination structure as a floating structure. A Schottky contact region is disposed within the active region. A conductive layer is electrically connected to the Schottky contact region and the first conductive layer extends onto a surface of the dielectric layer and laterally overlaps at least a portion of the termination trench. |
---|---|
Bibliography: | Application Number: US201916396446 |