DIELECTRIC ISOLATION LAYER BETWEEN A NANOWIRE TRANSISTOR AND A SUBSTRATE

Gate all around semiconductor devices, such as nanowire or nanoribbon devices, are described that include a low dielectric constant ("low-κ") material disposed between a first nanowire closest to the substrate and the substrate. This configuration enables gate control over all surfaces of...

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Bibliographic Details
Main Authors Guler, Leonard, Kang, Jun Sung, Beattie, Bruce E, Guha, Biswajeet, Hsu, William
Format Patent
LanguageEnglish
Published 26.12.2019
Subjects
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