Copper Electrodeposition in Microelectronics
An electrolytic plating composition for superfilling submicron features in a semiconductor integrated circuit device and a method of using the same. The composition comprises (a) a source of copper ions to electrolytically deposit copper onto the substrate and into the electrical interconnect featur...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
26.12.2019
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Subjects | |
Online Access | Get full text |
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Summary: | An electrolytic plating composition for superfilling submicron features in a semiconductor integrated circuit device and a method of using the same. The composition comprises (a) a source of copper ions to electrolytically deposit copper onto the substrate and into the electrical interconnect features, and (b) a suppressor comprising at least three amine sites, said polyether comprising a block copolymer substituent comprising propylene oxide (PO) repeat units and ethylene oxide (EO) repeat units, wherein the number average molecular weight of the suppressor compound is between about 1,000 and about 20,000. |
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Bibliography: | Application Number: US201716334168 |