EQUALIZER AND TRANSMITTER INCLUDING THE SAME

An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to...

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Bibliographic Details
Main Authors KANG, GUN-IL, LEE, JUNE-HEE, CHO, BYUNG-WOOK
Format Patent
LanguageEnglish
Published 12.12.2019
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Summary:An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to a filter coefficient sequence. A lookup table outputs the equalized digital signal of a value corresponding to the extracted symbol sequence. A digital-to-analog converter (DAC) converts the equalized digital signal into the equalized signal. A controller refreshes the lookup table, based on at least one of values stored in the data storage and values included in the lookup table, in response to a control signal.
Bibliography:Application Number: US201816224850