SOFTWARE DEFINED RADAR ARCHITECTURES
Example software defined radar architectures are disclosed. Example chipsets disclosed herein to implement a software defined radar architecture include a digital processor chip including a first serial port and a second serial port. Disclosed example chipsets also include a transmitter chip to gene...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
26.09.2019
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Subjects | |
Online Access | Get full text |
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Summary: | Example software defined radar architectures are disclosed. Example chipsets disclosed herein to implement a software defined radar architecture include a digital processor chip including a first serial port and a second serial port. Disclosed example chipsets also include a transmitter chip to generate a plurality of transmit signals based on baseband radar waveform data to be obtained from the digital processor chip, the transmitter chip including a third serial port to communicate with the first serial port of the digital processor chip to obtain the baseband radar waveform data. Disclosed example chipsets further include a receiver chip to determine baseband received radar data from a plurality of radar signals, the receiver chip including a fourth serial port to communicate with the second serial port of the digital processor chip to provide the baseband received radar data to the digital processor chip. |
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Bibliography: | Application Number: US201916442100 |