MEMORY CIRCUITS PRECHARGING MEMORY CELL ARRAYS AND MEMORY DEVICES INCLUDING THE SAME

A memory circuit and a memory device including the same are provided. The memory circuit may be connected to a bit line and a complementary bit line and configured to perform precharging on the bit line and the complementary bit line. The memory circuit may include: an equalizer configured to equali...

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Bibliographic Details
Main Authors KIM, SANG-YUN, CHOI, JIN-YONG, CHANG, SOO-BONG
Format Patent
LanguageEnglish
Published 16.05.2019
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A memory circuit and a memory device including the same are provided. The memory circuit may be connected to a bit line and a complementary bit line and configured to perform precharging on the bit line and the complementary bit line. The memory circuit may include: an equalizer configured to equalize voltage levels of the bit line and the complementary bit line by connecting the bit line with the complementary bit line in response to an equalizing signal; and a precharger configured to precharge the bit line and the complementary bit line to a precharge voltage in response to a precharge signal. The equalizing signal and the precharge signal may be received via separate lines.
Bibliography:Application Number: US201816011662