MEMORY DOMAINS PROTECTION METHOD AND APPARATUS WITH COMPOSITE PROTECTION KEY NUMBERS
In embodiments, an apparatus for computing includes a protection key register (PKR) having 2N bits, where N is an integer, to store a plurality of permission entries corresponding to protected memory domains, and a protected memory domain controller, coupled to the PKR. In embodiments, the memory do...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
02.05.2019
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Subjects | |
Online Access | Get full text |
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Summary: | In embodiments, an apparatus for computing includes a protection key register (PKR) having 2N bits, where N is an integer, to store a plurality of permission entries corresponding to protected memory domains, and a protected memory domain controller, coupled to the PKR. In embodiments, the memory domain controller is to: obtain protection key (PK) bits from a page table entry for a target page address; obtain one or more additional PK bits from a target linear memory address; and combine the PK bits and the additional PK bits to form a PK domain number to index into the plurality of permission entries in the PKR to obtain a permission entry for a protected memory domain. |
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Bibliography: | Application Number: US201816229857 |