CACHE SYNONYM SYSTEM AND METHOD

A method for tracking and invalidating memory address synonyms in a cache memory system includes receiving a request to associate a second memory address with a first memory address in a cache memory system that supports synonyms, wherein the second memory address and the first memory address each c...

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Bibliographic Details
Main Authors Recktenwald, Martin, Hinrichs, Willm
Format Patent
LanguageEnglish
Published 21.03.2019
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A method for tracking and invalidating memory address synonyms in a cache memory system includes receiving a request to associate a second memory address with a first memory address in a cache memory system that supports synonyms, wherein the second memory address and the first memory address each comprise a synonym identifier. The method also includes determining a set of differing bits within the synonym identifier of the first memory address and the second memory address, and including the set of differing bits within a set of synonym generation bits for the cache memory system. A corresponding apparatus, computer program product, and system are also disclosed herein.
Bibliography:Application Number: US201715825639