COUNTER CIRCUITRY AND METHOD

• Main Authors: HORLEY, John Michael, CRAWFORD, Ashley John
• Format: Patent
• Language: English
• Published: 28.02.2019
• Subjects: ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDEDFOR ELSEWHERE; BASIC ELECTRONIC CIRCUITRY; CALCULATING; CHECKING-DEVICES; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; GENERATING RANDOM NUMBERS; GENERATION OF NOISE BY SUCH CIRCUITS; GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING,BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN ANON-SWITCHING MANNER; PHYSICS; PULSE TECHNIQUE; REGISTERING OR INDICATING THE WORKING OF MACHINES; SELECTING RESONANT CIRCUITS; TIME OR ATTENDANCE REGISTERS; TUNING RESONANT CIRCUITS; VOTING OR LOTTERY APPARATUS

Apparatus comprises master counter circuitry to generate a master count signal in response to a clock signal; slave counter circuitry responsive to the clock signal to generate a respective slave count signal; and a synchronisation connection providing signal communication between the master counter circuitry and the slave counter circuitry; the master counter circuitry being configured to provide to the slave counter circuitry via the synchronisation connection: (i) data indicative of a count offset value and (ii) a timing signal defining a timing relationship between the clock signal and the count offset value; and the slave counter circuitry being configured, during a synchronisation operation for that slave counter circuitry, to initialise a counting operation of that slave counter circuitry in response to the data indicative of the count offset value and a timing signal provided by the master counter circuitry.