APPARATUS AND METHOD FOR MEASURING PERFORMANCE OF MEMORY ARRAY

The disclosure is related a method for testing and measuring the performances of electrical components on a semiconductor IC device through a test apparatus (also referred to as a testline) disposed in a scribe line between the semiconductor IC devices on a wafer. The test apparatus may include a bu...

Full description

Saved in:
Bibliographic Details
Main Authors Huang, Shih-Feng, Chiu, Chi-Hsu, Ashok, Arjit, Wang, Yi-Sin
Format Patent
LanguageEnglish
Published 28.02.2019
Subjects
INFORMATION STORAGE
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
STATIC STORES
TESTING
Online AccessGet full text

Cover

More Information
Summary:The disclosure is related a method for testing and measuring the performances of electrical components on a semiconductor IC device through a test apparatus (also referred to as a testline) disposed in a scribe line between the semiconductor IC devices on a wafer. The test apparatus may include a built-in self-test (BIST) circuit and a duplication of the electrical components subjected to the performance measurement. Minimum and maximum testing voltages are provided to the test apparatus, where the range of voltage between the minimum and maximum testing voltages are divided into a plurality of testing operational voltages which are applied to the test apparatus. For each testing operational voltages, a memory array operation test is performed, where at least one of the testing operational voltages resulting in a performance failure is identified as the minimal operating voltage of the memory array.
Bibliography:Application Number: US201815879455