WHITE-BOX IMPLEMENTATIONS WITH GARBLED CIRCUITS

A method for producing a white-box implementation of a cryptographic function using garbled circuits, including: producing, by a first party, a logic circuit implementing the cryptographic function using a plurality of logic gates and a plurality of wires; garbling the produced logic circuit, by the...

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Bibliographic Details
Main Authors HOOGERBRUGGE, Jan, BOS, Joppe Willem, MICHIELS, Wilhelmus Petrus Adrianus Johannus, JOYE, Marc
Format Patent
LanguageEnglish
Published 13.12.2018
Subjects
ADVERTISING
CODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHERPURPOSES INVOLVING THE NEED FOR SECRECY
CRYPTOGRAPHY
DISPLAY
EDUCATION
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PHYSICS
SEALS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:A method for producing a white-box implementation of a cryptographic function using garbled circuits, including: producing, by a first party, a logic circuit implementing the cryptographic function using a plurality of logic gates and a plurality of wires; garbling the produced logic circuit, by the first party, including garbling the plurality of logic gates and assigning two garbled values for each of the plurality of wires; and providing a second party the garbled logic circuit and a first garbled circuit input value.
Bibliography:Application Number: US201715617940