SYSTEM AND METHOD FOR DESIGN BASED INSPECTION

Design information related to an irrelevant area of a first layer of semiconductor article may be received. The first layer may be manufactured by illuminating a lithographic mask during a lithographic process. First layer information associated with an outcome or an expected outcome of the illumina...

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Bibliographic Details
Main Authors Rosenweig, Moshe, Parizat, Ziv
Format Patent
LanguageEnglish
Published 13.12.2018
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
CALCULATING
CINEMATOGRAPHY
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTROGRAPHY
HOLOGRAPHY
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
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Summary:Design information related to an irrelevant area of a first layer of semiconductor article may be received. The first layer may be manufactured by illuminating a lithographic mask during a lithographic process. First layer information associated with an outcome or an expected outcome of the illuminating of the lithographic mask during the lithographic process may be received. Information corresponding to a layout of an irrelevant area may be identified in the first layer information. A differentiating attribute that differentiates the layout of the irrelevant area from a layout of a relevant area of the first layer of the semiconductor article may be identified. The differentiating attribute may be used to determine one or more other irrelevant areas of the first layer of the semiconductor article.
Bibliography:Application Number: US201816105430