Charge Trapping Split Gate Device and Method of Fabricating Same

A split gate device that includes a memory gate and a select gate disposed side by side, a dielectric structure having a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory...

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Bibliographic Details
Main Authors Fang, Shenqing, KIM, Unsoon, HADDAD, Sameer S, Chen, Chun, Ramsbey, Mark T, Chang, Kuo Tung
Format Patent
LanguageEnglish
Published 08.11.2018
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A split gate device that includes a memory gate and a select gate disposed side by side, a dielectric structure having a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory gate, and a spacer formed over the select gate along an inner sidewall of the memory gate. Other embodiments of embedded split gate devices including high voltage and low voltage transistors are also disclosed.
Bibliography:Application Number: US201815949328