Combined Analog Architecture and Functionality in a Mixed-Signal Array

A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is con...

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Bibliographic Details
Main Authors Kutz, Harold M, Byrkett, Bruce E, Williams, Timothy John, Thiagarajan, Eashwar, Sullam, Bert S, Hastings, Mark E, Wright, David G, Seguine, Dennis R, Snyder, Warren S, Shutt, James H, Mar, Monte, Kohagen, Nathan Wayne
Format Patent
LanguageEnglish
Published 11.10.2018
Subjects
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PULSE TECHNIQUE
TESTING
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Summary:A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
Bibliography:Application Number: US201815944244