FORMING BOTTOM ISOLATION LAYER FOR NANOSHEET TECHNOLOGY

A method of forming a semiconductor structure includes forming a multi-layer structure. The multi-layer structure has a substrate and two or more nanosheet layers formed above the substrate. The method also includes forming a bottom isolation layer between the substrate and the two or more nanosheet...

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Bibliographic Details
Main Authors Zhang, Chen, Yeung, Chun W
Format Patent
LanguageEnglish
Published 13.09.2018
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of forming a semiconductor structure includes forming a multi-layer structure. The multi-layer structure has a substrate and two or more nanosheet layers formed above the substrate. The method also includes forming a bottom isolation layer between the substrate and the two or more nanosheet layers. The method further includes performing a fin reveal in the multi-layer structure after formation of the bottom isolation layer to form a fin. The two or more nanosheet layers provide a channel stack for a nanosheet field-effect transistor.
Bibliography:Application Number: US201815946768