TRANSISTOR ARRAY PANEL

A transistor display panel includes a substrate, a gate line disposed on the substrate, a data line disposed on the substrate, and a transistor disposed on the substrate. The transistor includes a first electrode, a second electrode overlapping the first electrode, a semiconductor layer disposed bet...

Full description

Saved in:
Bibliographic Details
Main Authors NOH, Jung-Hun, Jeon, Hyung-Il, Jang, Sang-Hee, Lee, Hyun Sup, Choi, Byung Seok
Format Patent
LanguageEnglish
Published 19.07.2018
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A transistor display panel includes a substrate, a gate line disposed on the substrate, a data line disposed on the substrate, and a transistor disposed on the substrate. The transistor includes a first electrode, a second electrode overlapping the first electrode, a semiconductor layer disposed between the first electrode and the second electrode, and a gate electrode. The semiconductor layer is disposed in an overlapping region where the gate line and the data line overlap each other.
Bibliography:Application Number: US201815866915