TRANSISTOR ARRAY PANEL
A transistor display panel includes a substrate, a gate line disposed on the substrate, a data line disposed on the substrate, and a transistor disposed on the substrate. The transistor includes a first electrode, a second electrode overlapping the first electrode, a semiconductor layer disposed bet...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
19.07.2018
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Subjects | |
Online Access | Get full text |
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Summary: | A transistor display panel includes a substrate, a gate line disposed on the substrate, a data line disposed on the substrate, and a transistor disposed on the substrate. The transistor includes a first electrode, a second electrode overlapping the first electrode, a semiconductor layer disposed between the first electrode and the second electrode, and a gate electrode. The semiconductor layer is disposed in an overlapping region where the gate line and the data line overlap each other. |
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Bibliography: | Application Number: US201815866915 |