METHOD OF FORMING BANDGAP REFERENCE INTEGRATED CIRCUIT

A method of forming an integrated circuit comprises forming a first doped region and a second doped region in a substrate. The second doped region is formed separate from the first doped region by a first spacing. A dielectric layer is formed over the substrate, and a gate is formed over the dielect...

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Bibliographic Details
Main Authors JOU, Chewn-Pu, WANG, Chien-Jung
Format Patent
LanguageEnglish
Published 24.05.2018
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of forming an integrated circuit comprises forming a first doped region and a second doped region in a substrate. The second doped region is formed separate from the first doped region by a first spacing. A dielectric layer is formed over the substrate, and a gate is formed over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate, opposite the first substrate side of the gate. A third doped region is formed in the substrate separated from the first doped region by a second spacing. The method further comprises forming a fourth doped region in the substrate.
Bibliography:Application Number: US201815876999