SEMICONDUCTOR DEVICE ISOLATION WITH RESURF LAYER ARRANGEMENT
A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconduct...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
10.05.2018
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Subjects | |
Online Access | Get full text |
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Summary: | A device includes a semiconductor substrate, a doped isolation barrier disposed in the semiconductor substrate, a body region disposed in the semiconductor substrate within the doped isolation barrier and in which a channel is formed during operation, an isolation contact disposed at the semiconductor substrate and to which a voltage is applied during operation, and a plurality of reduced surface field (RESURF) layers disposed in the semiconductor substrate, the plurality of reduced surface field (RESURF) layers being arranged in a stack between the body region and the isolation contact. |
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Bibliography: | Application Number: US201615348768 |