BRIDGING LOCAL SEMICONDUCTOR INTERCONNECTS

A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one...

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Bibliographic Details
Main Authors Daurelle Yannick, Li Wai-Kin, Lin Chieh-Yu
Format Patent
LanguageEnglish
Published 15.02.2018
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Summary:A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
Bibliography:Application Number: US201715795283