CIRCUITRY WITH VOLTAGE LIMITING AND CAPACTIVE ENHANCEMENT

Aspects of the present disclosure are directed to circuitry operable with enhanced capacitance and mitigation of avalanche breakdown. As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves respective transistors of a cascode circuit, one of which contro...

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Bibliographic Details
Main Authors Sonsky Jan, Lai Yan, Rutter Philip, Peake Steven Thomas, Wynne Barry
Format Patent
LanguageEnglish
Published 04.01.2018
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Aspects of the present disclosure are directed to circuitry operable with enhanced capacitance and mitigation of avalanche breakdown. As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves respective transistors of a cascode circuit, one of which controls the other in an off state by applying a voltage to a gate thereof. A plurality of doped regions are separated by trenches, with the conductive trenches being configured and arranged with the doped regions to provide capacitance across the source and the drain of the second transistor, and restricting voltage at one of the source and the drain of the second transistor, therein mitigating avalanche breakdown of the second transistor.
Bibliography:Application Number: US201615200308