CACHE OFFLOAD ACROSS POWER FAIL

The disclosed technology provides for selection of a subset of available non-volatile memory devices in an array to receive a dirty cache data of a volatile cache responsive to detection of a power failure. In one implementation, the selection of the non-volatile memory devices is based on one or mo...

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Bibliographic Details
Main Authors Ish Mark, Panda Siddhartha Kumar, Arunachalam Bagavathy Raj, Sundararaman Balakrishnan, Nemawarkar Shashank
Format Patent
LanguageEnglish
Published 16.11.2017
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:The disclosed technology provides for selection of a subset of available non-volatile memory devices in an array to receive a dirty cache data of a volatile cache responsive to detection of a power failure. In one implementation, the selection of the non-volatile memory devices is based on one or more predictive power parameters usable to estimate a time remaining during which a reserve power supply can support a cache offload to the selected subset of devices.
Bibliography:Application Number: US201615152374