NON-PLANAR TRANSISTOR

A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a first spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The fin structure includes an upper portion, a con...

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Bibliographic Details
Main Authors Li Jhen-Cyuan, Huang Nan-Yuan, Lu Shui-Yen
Format Patent
LanguageEnglish
Published 22.06.2017
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A non-planar transistor is provided. It includes a substrate, a fin structure, a gate structure, a first spacer structure and a source/drain region. The fin structure is disposed on the substrate, the gate structure is disposed on the fin structure. The fin structure includes an upper portion, a concave portion and a lower portion, and the concave portion is disposed between the upper portion and the lower portion. The first spacer structure is disposed on a sidewall of the gate structure. The first spacer structure includes a first spacer and a second spacer, wherein the first spacer is disposed between the second spacer, and a height of the first spacer is different from a height of the second spacer. The source/drain region is disposed in a semiconductor layer at two sides of the first spacer structure.
Bibliography:Application Number: US201715447134