SEMICONDUCTOR PACKAGE ALIGNMENT FRAME FOR LOCAL REFLOW

• Main Authors: CARTER DANIEL P, JASNIEWSKI JOSEPH J, AOKI RUSSELL S, FERGUSON SHELBY A, CARSTENS JONATHON R, HUI MICHAEL R, BOYD THOMAS A, KOFSTAD HARVEY R, BRAZEL MICHAEL S, YEE RASHELLE, VALPIANI ANTHONY P
• Format: Patent
• Language: English
• Published: 22.06.2017
• Subjects: BASIC ELECTRIC ELEMENTS; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR; PERFORMING OPERATIONS; SEMICONDUCTOR DEVICES; SOLDERING OR UNSOLDERING; TRANSPORTING; WELDING; WORKING BY LASER BEAM

Embodiments of the present disclosure describe package alignment frames for a local reflow process to attach a semiconductor package to an interposer. The frame may comprise a two frame system. The interposer may be on a mounting table or on a circuit board. The frame may include a body with a rectangular opening dimensioned to receive a semiconductor package to be coupled to the interposer. The frame may be to align a ball grid array of the semiconductor package with pads of the interposer. A second frame may be to receive the first frame and may be to align a ball grid array of the interposer with pads of the circuit board. A single frame may be used to couple a semiconductor package to an interposer and to couple the interposer to a circuit board. Other embodiments may be described and/or claimed.