ELECTRONIC SYSTEM WITH MEMORY MANAGEMENT MECHANISM AND METHOD OF OPERATION THEREOF

An electronic system includes: a processor configured to access operation data; a local cache memory, coupled to the processor, configured to store a limited amount of the operation data; a memory controller, coupled to the local cache memory, configured to maintain a flow of the operation data; and...

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Bibliographic Details
Main Authors Malladi Krishna, Kang Uksong, Zheng Hongzhong
Format Patent
LanguageEnglish
Published 08.06.2017
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An electronic system includes: a processor configured to access operation data; a local cache memory, coupled to the processor, configured to store a limited amount of the operation data; a memory controller, coupled to the local cache memory, configured to maintain a flow of the operation data; and a memory subsystem, coupled to the memory controller, including: a first tier memory configured to store the operation data, with critical timing, by a fast control bus, and a second tier memory configured to store the operation data with non-critical timing, by a reduced performance control bus.
Bibliography:Application Number: US201615174986