Compact Semiconductor Memory Device Having Reduced Number of Contacts, Methods of Operating and Methods of Making

An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or siring includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number...

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Bibliographic Details
Main Author Widjaja Yuniarto
Format Patent
LanguageEnglish
Published 01.06.2017
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or siring includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as or less than the number of memory cells in the string or link.
Bibliography:Application Number: US201715428921