POWER RAIL INBOUND MIDDLE OF LINE (MOL) ROUTING

In certain aspects, a semiconductor die includes a power rail, a first gate, and a second gate. The semiconductor die also includes a first gate contact electrically coupled to the first gate, wherein the first gate contact is formed from a first middle of line (MOL) metal layer, and a second gate c...

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Bibliographic Details
Main Authors Duan Zhengyu, Malabry Mickael, Lim Hyeokjin Bruce, Ye Qi
Format Patent
LanguageEnglish
Published 11.05.2017
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:In certain aspects, a semiconductor die includes a power rail, a first gate, and a second gate. The semiconductor die also includes a first gate contact electrically coupled to the first gate, wherein the first gate contact is formed from a first middle of line (MOL) metal layer, and a second gate contact electrically coupled to the second gate, wherein the second gate contact is formed from the first MOL metal layer. The semiconductor die further includes an interconnect formed from a second MOL metal layer, wherein the interconnect is electrically coupled to the first and second gate contacts, and at least a portion of the interconnect is underneath the power rail.
Bibliography:Application Number: US201514936459